Recently, amd submitted an IBS patch for Linux prefetching subsystem and utilities The full name of this function is "instruction based sampling", and it is also the first official patch of the company's Zen 4 CPU family Phoronix pointed out that with the submission of new patches for review, it means that Linux support for Zen 4 processor is advancing steadily.
(Figure via wccftech)
Relevant changes will be well reflected in the new patches and subsequent updates of the Linux open source operating system, and Zen 4 will enhance the use experience of IBS by creating additional data source extensions and filtering functions in case of L3 cache misses.
Linux kernel mailing list (lkml) wrote:
● the datasrc extension provides additional data source details for tagged load / store operations, and perf report / script raw dump also adds support for these.
● as for the working mode of L3 Miss filtering, it is realized by marking the instruction on the overflow of IBS calculator and generating a non maskable interrupt (NMI) when it causes L3 miss.
● this operation will discard L3 missed samples and reset the counter with random values - between 1-15 for fetch PMU and 1-127 for op PMU.
● when users are only interested in such samples, this filtering method will help to reduce the sampling overhead, such as when providing data to the page migration Daemon in the hierarchical memory system.
● in addition, the newly added l3missonly performance monitoring unit attribute enables the IBS driver to support the L3 Miss filtering function.
Wccftech added that the newly submitted option is also conducive to gradually adding relevant compilation functions. The perf hardware sampling structure is fed back to the compiler to help design binaries based on configuration file optimization.
For enterprise customers, in addition to looking at the utilization for potential analysis, optimization and problem debugging, AMD's Zen 4 IBS patch is attractive - although competitor Intel is more active in the development of new Linux features and hardware performance counters.