Amd Shares The New Details Of RDNA 3/navi 3x GPU, And The Microchip Helps Improve Energy Efficiency By 50%

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During the 2022 financial analyst day, amd not only talked about the roadmap update of Zen 4 / Zen 5 CPU, but also talked about the rDNA 3 / NAVI 3x GPU launched by silent Amd had been silent on the expectations of rDNA 3. However, as the rnda 2 architecture is about to turn two years old and the first rDNA 3 products are about to be released in 2022, the company has finally disclosed some important details.

First, the Navi 3x GPU will adopt TSMC 5nm process, and is expected to bring a 50% higher performance improvement per watt than rDNA 2, similar to the iteration from rDNA 1 to rDNA 2.

Since rDNA 2 has already brought considerable surprises to the market, we are also full of expectations for the latest official disclosure. The difference is that AMD does not need to rely solely on Architecture / dvfs optimization to achieve this goal.

As a reference, rDNA 2 / NAVI 2x GPU adopts TSMC N7 / N6 process, while rDNA 3 / NAVI 3x GPU will usher in full node improvement based on 5nm new process.

In addition, the iterative infinite cache on chip, the optimized graphics pipeline, and the reorganized GPU computing unit (renamed from Cu to WGP cluster).

But what interests us most is the rumors about small chips that have been circulating for a year. Several earlier patent applications have indicated that at least one rnda 3 GPU is changing from a "single chip" to a new design using multiple small chips.

From the perspective of process yield, small chip is definitely a major transformation of GPU construction. Thanks to this, designers can easily expand the GPU to a larger scale.

Whereas amd has successfully applied the multi CCD + IOD design on the CPU product line, and Apple Also try to bridge two M1 SOCS into M1 Ultra.

A large amount of data (bandwidth up to tb/s) that needs to be transferred between various chips within the GPU can also be effectively guaranteed.

Interestingly, amd said it would adopt "advanced" small chip design. It is speculated that it should choose advanced high-density interconnect packaging technology similar to emib.

As a reference, the company only uses a relatively simple 'organic packaging signal routing' scheme on Zen 2 / 3.

Unlike the insict Mi 200 series GPU accelerators, the 'local silicon interconnect' (LSI) technology that directly and tightly bridges two rDNA 3 microchips has been used.

As for the truth, please wait patiently for the official release of the radeon RX 7000 series rDNA 3 GPU product line later this year.

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